Mixsonian


Microprocessor Design Class
1975

    One of the more interesting classes I took was in microprocessor design, This was a graduate level class EE-691. You must realize that this was before the advent of the Personal Computer and the year of the first significant micro processor the Intel 8080 was released. Previously there was the Intel 4004 and a couple of other "calculator" type processors out. The primary project for the class was to design a microprocessor that could be made into silicon.  We had to design the circuitry, the instruction set and the micro code to implement the instruction set. We also had then to write a program that emulated the design, executing the micro code, which interpreted the instructions for a program.  We were assigned into teams of three.  On my team was Jim Booth, Robin Cooper and myself.  I remember little of Jim, but Robin was a good friend who worked with me at the University Center CIRCA department who I had convinced to take the course with me.

    The title of our final paper was "Our Baby, An Imaginative Illustration of a 16 bit/word stack oriented microprocessor.  With loving care."   Clearly Robin had a say in the title.   The "16-bit" was very novel at the time since the Intel 8080, and 8 -bit processor, was just introduced earlier that year. 

   Here are the initial sections of the paper:

Motivation

   The motivation for the designing a process is, of course, not our own initiation.  However, as or project progress, a "Real World" use for a processor of our type became clear.   Even though many of the early decisions were made on other considerations, a topology and control method was devised that, we believe, is very applicable to original equipment manufacturers.  With this market in mind, we wish to point out the advantages of the concepts and capabilities of the processor we designed. 

 

Objectives

   To design a simple, general, flexible mini-controller that can be incorporated easily into machinery or systems requiring resident intelligence.   Simple, because of our limited experience and the short time available, and to make manufacture more profitable.   General, to make the processor more modular and more applicable to a wider group of buyers.  Flexible, to allow the manufacturer of the processor to easily adapt it to specific tasks and timing the buyer requires.

 

Realization

   To fulfill the above objectives, we chose a singe bus - drop topology.  This allows for maximum modularity and minimum interfacing problems.  We also chose micro-control to insure maximum flexibility of processor characteristics and capabilities.  In add, the specified stack orientation of computation, and for level I/O structure lend very well to multiple machine or system control.  The principle drawback of our processor is in speed.  Because of ROM technology and the bus topology, speed was sacrificed for generality, flexibility and simplicity.

 

  This project specifies the software, firmware , and hardware included in the "General Purpose" edition of out processor, as the was the requirement of the project.   However, it is conceivable that a specific buyer could configure a very wide variety of special purpose processors with our basic design.

   We further certify that the following project is wholly our own work, and is original in our eyes.

 

The full paper can be found here "Our Baby".

 

Anecdote:  In 2016 out of a whim I looked up Jim in Linkedn and recieved the following from him:

Larry,  
Indeed I believe this was a project to which I contributed.  As I recall we broke the design up and I handled the Instruction Decoder and ALU ... plus maybe the register file.  I recall the realization that I would need multiple read taps and two write paths and deciding how to detect and serialize simultaneous write requests had me bum fuzzled for many hours.  As I recall this was a two-all-nighter and we had to do individual face-to-face reports to the professor.  I remember none of what I said as I was (almost certainly) near manic.